The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

May. 24, 2013
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Claudio Rey, Tempe, AZ (US);

David Harnishfeger, Chandler, AZ (US);

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0802 (2013.01);
Abstract

A method of controlling a hybrid phase-locked loop may include generating a first control signal based on an offset signal and a second control signal and determining a difference between the first and the second control signals. The method may further include adjusting a value of the offset signal based on the difference between the first and the second control signals to drive a level of the first control signal to a level of the second control signal. The method may further include determining when the level of the first control signal crosses the level of the second control signal. After the level of the first control signal crosses the level of the second control signal, the method may include adjusting the value of the offset signal based on a number of occurrences of the level of the first control signal crossing the level of the second control signal.


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