The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2014
Filed:
Jan. 21, 2013
Intel Corporation, Santa Clara, CA (US);
Subratakumar Mandal, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An embodiment of the invention includes dynamically adjusting gain peaking of circuit logic such that error rates are acceptable across various process/voltage/temperature (PVT) ranges. An embodiment uses PVT dependant programming, such as but not limited to resistance compensation (RCOMP) codes, to control impedance compensation logic, such as but not limited to a Continuous Time Linear Equalization (CTLE) circuit. The PVT programming may be used to control gain peaking amplitude and gain peaking frequency across ranges of different PVTs. As a result, error performance is not impaired across different PVT corners and gain peaking is more consistent across different PVT corners. Other embodiments are included herein.