The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2014
Filed:
Nov. 21, 2011
Alexei Marakhtanov, San Jose, CA (US);
Rajinder Dhindsa, San Jose, CA (US);
Ken Lucchesi, San Jose, CA (US);
Alexei Marakhtanov, San Jose, CA (US);
Rajinder Dhindsa, San Jose, CA (US);
Ken Lucchesi, San Jose, CA (US);
Lam Research Corporation, Fremont, CA (US);
Abstract
A system and method of measuring a self bias DC voltage on a semiconductor wafer in a plasma chamber includes generating a plasma between a top electrode and a top surface of an electrostatic chuck in a plasma chamber including applying one or more RF signals to one or both of the top electrode and electrostatic chuck. The wafer is supported on the top surface of an electrostatic chuck. The self bias DC voltage is developed on the wafer. A vibrating electrode is oscillated to produce a variable capacitance, the vibrating electrode is located in the electrostatic chuck. An electrical current is developed in a sensor circuit. An output voltage is measured across a sampling resistor in the sensor circuit, a second DC potential is applied to the vibrating electrode to nullify the output voltage. The second DC potential is equal to the self bias DC voltage on the wafer.