The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Apr. 24, 2012
Applicants:

Chia-yang Hung, Kaohsiung, TW;

Po-zen Chen, Tainan, TW;

Szu-hung Yang, Tainan, TW;

Chih-cherng Jeng, Madou Township, TW;

Chih-kang Chao, Tainan, TW;

I-i Cheng, Tainan, TW;

Inventors:

Chia-Yang Hung, Kaohsiung, TW;

Po-Zen Chen, Tainan, TW;

Szu-Hung Yang, Tainan, TW;

Chih-Cherng Jeng, Madou Township, TW;

Chih-Kang Chao, Tainan, TW;

I-I Cheng, Tainan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/18 (2006.01); H01L 21/311 (2006.01); H01L 21/66 (2006.01); H01L 23/48 (2006.01); H01L 21/762 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps.


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