The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Nov. 18, 2011
Applicants:

Tony Vanhoucke, Bierbeek, BE;

Johannes Josephus Theodorus Marinus Donkers, Valkenswaard, NL;

Hans Mertens, Leuven, BE;

Blandine Duriez, Brussels, BE;

Evelyne Gridelet, Omal, BE;

Inventors:

Tony Vanhoucke, Bierbeek, BE;

Johannes Josephus Theodorus Marinus Donkers, Valkenswaard, NL;

Hans Mertens, Leuven, BE;

Blandine Duriez, Brussels, BE;

Evelyne Gridelet, Omal, BE;

Assignee:

NXP, B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/737 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0821 (2013.01); H01L 29/7378 (2013.01); H01L 29/66242 (2013.01);
Abstract

Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.


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