The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Feb. 10, 2014
Applicant:

Semileds Optoelectronics Co., Ltd., Chu-Nan, TW;

Inventors:

Chen-Fu Chu, Hsinchu, TW;

Wen-Huang Liu, Guan-Xi Town, TW;

Jiunn-Yi Chu, Chubei, TW;

Chao-Chen Cheng, Hsinchu, TW;

Hao-Chun Cheng, Pingtung County, TW;

Feng-Hsu Fan, Jhonghe, TW;

Trung Tri Doan, Baoshan Township, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 33/00 (2010.01); H01L 33/10 (2010.01);
U.S. Cl.
CPC ...
H01L 33/0066 (2013.01); H01L 33/0075 (2013.01); H01L 33/10 (2013.01); H01L 33/0079 (2013.01);
Abstract

A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.


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