The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2014
Filed:
Jan. 16, 2008
Yoshio Oka, Osaka, JP;
Jinjoo Park, Osaka, JP;
Kazuyuki Maeda, Osaka, JP;
Narito Yagi, Osaka, JP;
Tetsuya Shimomura, Kouga, JP;
Junichiro Nishikawa, Kouga, JP;
Yoshio Oka, Osaka, JP;
Jinjoo Park, Osaka, JP;
Kazuyuki Maeda, Osaka, JP;
Narito Yagi, Osaka, JP;
Tetsuya Shimomura, Kouga, JP;
Junichiro Nishikawa, Kouga, JP;
Sumitomo Electric Industries, Ltd., Osaka, JP;
Sumitomo Electric Printed Circuits, Inc., Shiga, JP;
Abstract
The printed wiring boardincludes the metallic substrate, the insulating layerprovided on the surface of the metallic substrate, and the conductive layerformed on the surface of the insulating layer. The conductive layeris electrically connected to the metallic substrate. A bottomed via hole or a through holeis formed in the insulating layerand the conducive layer. The via hole has a bottom in the metallic substrate, and has a wall surface in the insulating layerand in the conductive layer. The through holeextends through the insulating layer, the conductive layer, and the metallic substrate. Conductive pastefills the bottomed via hole or the through holeto electrically connect the metallic substrateand the conductive layerwith each other. The printed wiring boardis subjected to a process in which current is applied to the interface between the metallic substrateand the conductive paste