The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Feb. 04, 2009
Applicants:

Bryan P. Black, Austin, TX (US);

Nicholas G. Samra, Austin, TX (US);

M. Clair Webb, Aloha, OR (US);

Inventors:

Bryan P. Black, Austin, TX (US);

Nicholas G. Samra, Austin, TX (US);

M. Clair Webb, Aloha, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2006.01); G06F 15/78 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7832 (2013.01); H01L 2224/131 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/13025 (2013.01); H01L 25/0657 (2013.01); H01L 24/16 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/16145 (2013.01); H01L 2924/00013 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06513 (2013.01);
Abstract

Disclosed are a multi-die processor apparatus and system. Processor logic to execute one or more instructions is allocated among two or more face-to-faces stacked dice. The processor includes a conductive interface between the stacked dice to facilitate die-to-die communication.


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