The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Jan. 04, 2011
Applicants:

Chih-chiang LU, Hsinchu, TW;

Wei-chih Peng, Hsinchu, TW;

Shiau-huei San, Hsinchu, TW;

Min-hsun Hsieh, Hsinchu, TW;

Inventors:

Chih-Chiang Lu, Hsinchu, TW;

Wei-Chih Peng, Hsinchu, TW;

Shiau-Huei San, Hsinchu, TW;

Min-Hsun Hsieh, Hsinchu, TW;

Assignee:

Epistar Corporation, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/36 (2010.01); H01L 33/38 (2010.01); H01L 33/40 (2010.01); H01L 33/50 (2010.01); H01L 33/44 (2010.01);
U.S. Cl.
CPC ...
H01L 33/405 (2013.01); H01L 33/387 (2013.01); H01L 33/508 (2013.01); H01L 33/44 (2013.01);
Abstract

An embodiment of the invention discloses an optoelectronic semiconductor device. The optoelectronic semiconductor comprises a unit having a plurality of electrical connectors with top surfaces; an insulating material surrounding each of the plurality of electrical connectors, wherein each of the top surfaces are exposed through the insulating material; a semiconductor system, having a side surface directly covered by the insulation material, electrically connected to the plurality of electrical connectors and being narrower in width than both of the unit and the insulating material; an electrode formed on the semiconductor system at a position not corresponding to the plurality of electrical connectors; and a layer provided on the semiconductor system at a side opposite to the electrode and configured to laterally exceed outside more than one outermost boundary of the plurality of electrical connectors.


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