The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Sep. 07, 2007
Applicants:
Gerald Lackner, Arnoldstein, AT;
Christian Maier, Villach, AT;
Francisco Javier Santos Rodriguez, Villach, AT;
Inventors:
Gerald Lackner, Arnoldstein, AT;
Christian Maier, Villach, AT;
Francisco Javier Santos Rodriguez, Villach, AT;
Assignee:
Infineon Technologies AG, , DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23Q 3/00 (2006.01); H01L 21/304 (2006.01); H01L 21/683 (2006.01); H01L 21/687 (2006.01); H01L 21/268 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/683 (2013.01); H01L 21/304 (2013.01); H01L 2221/6834 (2013.01); H01L 21/68735 (2013.01); H01L 21/268 (2013.01); H01L 21/02104 (2013.01); H01L 21/6835 (2013.01); H01L 21/30604 (2013.01); H01L 21/6838 (2013.01); H01L 21/3065 (2013.01); H01L 21/6875 (2013.01);
Abstract
Some embodiments discussed relates to an apparatus for holding a substrate, comprising a body with a surface for a semiconductor wafer to rest on, with the surface having a first surface area on which a first area of the semiconductor wafer can rest, and a second surface area on which a second area of the semiconductor wafer can rest, wherein the second surface area protrudes with respect to the first surface area.