The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2014
Filed:
Jan. 18, 2012
Chien-hung Chen, Taipei, TW;
Yung-chow Peng, Hsinchu, TW;
Chung-hui Chen, Hsinchu, TW;
Chih Ming Yang, Hsinchu, TW;
Chien-Hung Chen, Taipei, TW;
Yung-Chow Peng, Hsinchu, TW;
Chung-Hui Chen, Hsinchu, TW;
Chih Ming Yang, Hsinchu, TW;
Abstract
A method of generating an optimized layout of semiconductor components in conformance with a set of design rules includes generating, for a unit cell including one or more semiconductor components, a plurality of configurations each of which satisfies some, but not all, of the design rules. For each configuration, it is checked whether a layout, which is a repeating pattern of the unit cell, satisfies the remaining design rules. Among the configurations which satisfy all of the design rules, the configuration providing an optimal value of a property is selected for generating the optimized layout of the semiconductor components.