The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2014

Filed:

Feb. 24, 2011
Applicants:

Shankar Channabasappa, San Jose, CA (US);

Amit Arora, Campbell, CA (US);

Inventors:

Shankar Channabasappa, San Jose, CA (US);

Amit Arora, Campbell, CA (US);

Assignee:

NetLogic Microsystems, Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit is disclosed. The integrated circuit includes a receive port interface to receive request data at a first data rate from a first host and a transmit port interface. The transmit port interface to transmit response data words across plural serial lanes to a second host at a second data rate. The second data rate is less than a predefined line rate of symbol transfers across the plural serial lanes. The transmit port interface includes shaping logic to transmit a data word stream at the second data rate and selectively insert idle words into the data word stream such that the data words and the idle words are together transferred at the predefined line rate.


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