The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2014
Filed:
Mar. 24, 2011
Applicants:
Hui H. Ngu, Penang Island, MY;
Bruce Gieseke, San Jose, CA (US);
Inventors:
Hui H. Ngu, Penang Island, MY;
Bruce Gieseke, San Jose, CA (US);
Assignee:
eASIC Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 8/16 (2006.01); G11C 11/412 (2006.01); G11C 11/413 (2006.01);
U.S. Cl.
CPC ...
G11C 11/412 (2013.01); G11C 8/16 (2013.01); G11C 11/413 (2013.01);
Abstract
A memory system may provide for a successful write of a multi-port memory cell (e.g., dual-port 2WR SRAM cell) when it is simultaneously accessed by more than one port. This multi-port memory cell may include at least two independent accesses to the memory cell, where each access may be controlled by an independent wordline signal. Each port may have an independent pair of bitlines. Multiple write circuitry (e.g., double write circuitry) may enable the write driver to drive the input data to more than one pair of bitlines simultaneously.