The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2014

Filed:

Aug. 26, 2013
Applicant:

National Tsing Hua University, Hsinchu, TW;

Inventors:

Ming-Chang Lee, Hsinchu, TW;

Chih-Kuo Tseng, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02532 (2013.01); H01L 21/02647 (2013.01); H01L 21/02381 (2013.01); H01L 21/02455 (2013.01); H01L 21/02645 (2013.01); H01L 21/02639 (2013.01);
Abstract

The present invention relates to a self-aligned and lateral-assembly method for integrating heterogeneous material structures on the same plane. By using this method, two semiconductor materials heterogeneous to each other can be laterally assembled in a self-alignment way, without using any epitaxial buffer layers or gradient buffer layers. Therefore, when applying this method to fabricating an electronic device having heterojunction, not only the manufacture cost can be effectively reduced, but the difficulty of manufacturing process can also be overcome. Moreover, in this method, one amorphous heterogeneous semiconductor material would laterally grow to a crystal semiconductor material through epitaxy after being treated the rapid melting growth (RMG) process, and the epitaxial crystal semiconductor material would then be laterally assembled with the other one semiconductor material on an identical substrate, for carrying out the lateral assembly of the two heterogeneous semiconductor materials by using the self-alignment way and the smallest thermal budget.


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