The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2014
Filed:
Aug. 18, 2011
Sylvie Allard, Granby, CA;
Jean Audet, Granby, CA;
Kevin Arthur Dore, Wappinger Falls, NY (US);
Sylvain Pharand, St-Bruno, CA;
David John Russell, Owego, NY (US);
Sylvie Allard, Granby, CA;
Jean Audet, Granby, CA;
Kevin Arthur Dore, Wappinger Falls, NY (US);
Sylvain Pharand, St-Bruno, CA;
David John Russell, Owego, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for forming coreless flip chip ball grid array (FCBGA) substrates comprising the steps of sequentially depositing a pair of laminates, each having a plurality of insulated metallization layers simultaneously respectively on each side of a temporary carrier substrate, and then removing the temporary carrier to separate the pair of laminates, so that each laminate has an outer ball grid metal pad array, and during the depositing of the pair of laminates on the carrier substrate, further depositing a supporting layer of dielectric material enclosing the metal pad array, wherein said supporting layers of dielectric material provides structural support for each of the laminates after the separation.