The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2014

Filed:

Oct. 19, 2012
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;

Inventors:

Ching-Wei Wu, Nantou County, TW;

Kuang Ting Chen, Taipei, TW;

Cheng Hung Lee, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); G11C 17/12 (2006.01); G11C 7/00 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 5/02 (2013.01); G11C 11/5692 (2013.01); G11C 5/06 (2013.01);
Abstract

Among other things, an n-bit ROM cell, such as a twin-bit ROM cell, and techniques for addressing one or more ROM cell portions of the n-bit ROM cell are provided. A twin-bit ROM cell comprises a first ROM cell portion adjacent to or substantially contiguous with a second ROM cell portion. The first ROM cell portion is associated with a first data bit value. The second ROM cell portion is associated with a second data bit value distinct from the first data bit value. Because the first ROM cell portion is adjacent to the second ROM cell portion, OD-to-OD spacing between the twin-bit ROM cell and an adjacent twin-bit ROM cell is increased to provide, for example, improved isolation, cell current, ROM speed, and VCCmin performance in comparison with single-bit ROM cells, while maintaining a substantially similar to pitch as the single-bit ROM cells.


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