The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2014
Filed:
Dec. 28, 2011
Integrated circuit configuration having extension conductor structure and fabricating method thereof
Chin-sheng Yang, Hsinchu, TW;
Chin-Sheng Yang, Hsinchu, TW;
United Microelectronics Corporation, Hsinchu, TW;
Abstract
An integrated circuit configuration includes a substrate, a diffusion region, a gate structure, an extension conductor structure, a dielectric layer, a contact structure, and a metal conductor line. The diffusion region is formed in the substrate. The gate structure is formed over the substrate and spanned across the diffusion region. The extension conductor structure is formed over the semiconductor substrate and contacted with the diffusion region. The extension conductor structure is extended externally to a first position along a surface of the substrate, wherein the first position is outside the diffusion region. The dielectric layer is formed over the substrate, the gate structure and the extension conductor structure. The contact structure is penetrated through the dielectric layer to be contacted with the first position of the extension conductor structure. The metal conductor line is formed on the dielectric layer and contacted with the contact structure.