The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

Aug. 15, 2011
Applicants:

Donald S Bethune, San Jose, CA (US);

Kailash Gopalakrishnan, San Jose, CA (US);

Andrew J Kellock, Sunnyvale, CA (US);

Rohit S Shenoy, Fremont, CA (US);

Kumar R Virwani, San Jose, CA (US);

Inventors:

Donald S Bethune, San Jose, CA (US);

Kailash Gopalakrishnan, San Jose, CA (US);

Andrew J Kellock, Sunnyvale, CA (US);

Rohit S Shenoy, Fremont, CA (US);

Kumar R Virwani, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A crystalline semiconductor Schottky barrier-like diode sandwiched between two conducting electrodes is in series with a memory element, a word line and a bit line, wherein the setup provides voltage margins greater than 1V and current densities greater than 5×10A/cm. This Schottky barrier-like diode can be fabricated under conditions compatible with low-temperature BEOL semiconductor processing, can supply high currents at low voltages, exhibits high on-off ratios, and enables large memory arrays.


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