The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

Mar. 14, 2013
Applicants:

Tower Semiconductor Ltd., Migdal Haemek, IL;

Yissum Research Development Company of the Hebrew University of Jerusalem Ltd., Jerusalem, IL;

Inventors:

Yakov Roizin, Afula, IL;

Evgeny Pikhay, Haifa, IL;

Irit Chen-Zamero, Haifa, IL;

Ora Eli, Afula, IL;

Micha Asscher, Jerusalem, IL;

Amir Saar, Jerusalem, IL;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/042 (2014.01); H01L 31/0352 (2006.01); H01L 27/142 (2014.01); H01L 31/062 (2012.01);
U.S. Cl.
CPC ...
H01L 27/142 (2013.01); H01L 31/0352 (2013.01);
Abstract

A photovoltaic device includes lateral P-I-N light-sensitive diodes disposed on a silicon island formed by a P− epitaxial layer and surrounded by trenches that provide lateral isolation, where the island is separated from the substrate by a porous silicon region that is grown under the island and isolates the lower portions of the photovoltaic device from the highly doped substrate. The trenches extend through the P− epitaxial material into the P+ substrate to facilitate self-limiting porous silicon formation at the bottom of the island, and also to suppress electron-hole recombination. A protective layer (e.g., SiN) is formed on the trench walls to further restrict porous silicon formation to the bottom of the island. Black silicon on the trench walls enhances light capture. The photovoltaic devices form low-cost embedded photovoltaic arrays on CMOS IC devices, or are separated to produce low-cost, HV solar arrays for solar energy sources, e.g. for solar concentrators.


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