The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2014

Filed:

Sep. 23, 2011
Applicants:

Konda R. Baalaji, Karnataka, IN;

Malede W. Berhanu, Colchester, VT (US);

Vikram Iyengar, Pittsburgh, PA (US);

Douglas C. Pricer, Somerset, NJ (US);

Inventors:

Konda R. Baalaji, Karnataka, IN;

Malede W. Berhanu, Colchester, VT (US);

Vikram Iyengar, Pittsburgh, PA (US);

Douglas C. Pricer, Somerset, NJ (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2011.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system is provided for automatically generating valid at speed structural test (ASST) test groups. The method includes loading a netlist for an integrated circuit into a processor. The method further includes determining a plurality of clock domain crossings between a plurality of clock domains within the integrated circuit. The method further includes generating a first test group. The method further includes adding a first clock domain of the plurality of clock domains to the first test group. The method further includes adding a second clock domain of the plurality of clock domains to the first test group when the second clock domain does not have a clock domain crossing into the first clock domain.


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