The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2014
Filed:
Feb. 28, 2012
Qiuxia Xu, Beijing, CN;
Gaobo Xu, Beijing, CN;
Abstract
The present disclosure provides a method for forming and controlling a molecular level SiOinterface layer, mainly comprising: cleansing before growing the SiOinterface layer, growing the molecular level ultra-thin SiOinterface layer; and controlling reaction between high-K gate dielectric and the SiOinterface layer to further reduce the SiOinterface layer. The present disclosure can strictly prevent invasion of oxygen during process integration. The present disclosure can obtain a good-quality high-K dielectric film having a small EOT. The manufacturing process is simple and easy to integrate. It is also compatible with planar CMOS process, and can satisfy requirement of high-performance nanometer level CMOS metal gate/high-K device of 45 nm node and below.