The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2014

Filed:

Sep. 15, 2006
Applicants:

Ming-tsong Wang, Taipei, TW;

Tong-chern Ong, Taipei, TW;

Inventors:

Ming-Tsong Wang, Taipei, TW;

Tong-Chern Ong, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 29/792 (2006.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42348 (2013.01); H01L 29/7887 (2013.01); H01L 21/28273 (2013.01); H01L 29/7923 (2013.01); G11C 11/5671 (2013.01); H01L 21/28282 (2013.01); G11C 16/0466 (2013.01); G11C 16/10 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, a top gate over the semiconductor substrate, and a stacked gate between the top gate and the semiconductor substrate. The stacked gate includes a first tunneling layer, a first storage layer adjoining the first tunneling layer, and an additional layer adjoining the first tunneling layer. The additional layer is selected from the group consisting of a retention layer and an additional composite layer. The additional composite layer comprises a second tunneling layer and a second storage layer adjoining the second tunneling layer. The semiconductor device further includes a blocking layer adjoining the first storage layer.


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