The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2014

Filed:

Jan. 16, 2013
Applicants:

Namho Jeon, Hwaseong-si, KR;

Jun-su Kim, Anyang-si, KR;

Satoru Yamada, Seoul, KR;

Jaehoon Lee, Daejeon, KR;

Seunguk Han, Suwon-si, KR;

Jiyoung Kim, Yongin-si, KR;

Jin-seong Lee, Gyeonggi-do, KR;

Inventors:

Namho Jeon, Hwaseong-si, KR;

Jun-Su Kim, Anyang-si, KR;

Satoru Yamada, Seoul, KR;

Jaehoon Lee, Daejeon, KR;

Seunguk Han, Suwon-si, KR;

Jiyoung Kim, Yongin-si, KR;

Jin-Seong Lee, Gyeonggi-do, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

Semiconductor memory devices may include a write transistor including a first write gate controlling a first source/drain terminal and a second write gate controlling a channel region, and a read transistor including a memory node gate connected to the first source/drain terminal of the write transistor. The first write gate may have a first work function and the second write gate may have a second work function different from the first work function. The first source/drain terminal of the write transistor may not have a PN junction.


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