The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2014

Filed:

Aug. 08, 2012
Applicants:

Tim Niggemeier, Laatzen, DE;

Harry Barowski, Boeblingen, DE;

Maarten Boersma, Holzgerlingen, NL;

Gunnar Spiess, Balingen, DE;

Inventors:

Tim Niggemeier, Laatzen, DE;

Harry Barowski, Boeblingen, DE;

Maarten Boersma, Holzgerlingen, NL;

Gunnar Spiess, Balingen, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01);
Abstract

A method of power gating a microprocessor having an instruction scheduling unit for receiving issued instructions from an instruction decoder; an execution unit receiving and sending signals from and to the instruction scheduling unit; and a state machine. The method comprises: obtaining a number of instructions per cycle being issued to the instruction scheduling unit; determining, if the number of instruction per cycle being issued to the instruction scheduling unit is less than a threshold level, and then determining if at least two of the instructions being issued to the instruction scheduling unit are independent of each other only when the instructions per cycle is less than the threshold level; determining when at least two of the instructions being issued to the instruction scheduling unit are independent of each other; and power gating the microprocessor to gate off power to idle macros with a signal from the state machine.


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