The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2014

Filed:

Apr. 01, 2010
Applicants:

Bibbin Chacko, Chandler, AZ (US);

Guadalupe J. Garcia, Changler, AZ (US);

Saurabh Upadhyay, Chandler, AZ (US);

Inventors:

Bibbin Chacko, Chandler, AZ (US);

Guadalupe J. Garcia, Changler, AZ (US);

Saurabh Upadhyay, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/38 (2006.01); H04B 17/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To address the need for efficient and reliable testing of integrated devices, system on chips, and computers, deterministic behavior for an interface is accomplished by fixing variation in latency associated with receiver and transmitter data stream. The interface may be a serial interface that is PCIe compliant and corrects latency variations in the receiver that consequently results in deterministic transmit data. Consequently, the data received and/or transmitted is predictable with respect to time and facilitates testing and validation of the devices and logic associated with the interface.


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