The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2014

Filed:

Jul. 30, 2013
Applicants:

Moshe Agam, Portland, OR (US);

Thierry Coffi Herve Yao, Portland, OR (US);

Inventors:

Moshe Agam, Portland, OR (US);

Thierry Coffi Herve Yao, Portland, OR (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/525 (2006.01); H01L 29/78 (2006.01); H01L 29/788 (2006.01); H01L 27/088 (2006.01); H01L 27/112 (2006.01); H01L 21/76 (2006.01); G11C 17/14 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5252 (2013.01); H01L 27/088 (2013.01); H01L 29/788 (2013.01); H01L 29/7831 (2013.01); H01L 27/11206 (2013.01); H01L 21/76 (2013.01); G11C 17/14 (2013.01); H01L 27/0207 (2013.01);
Abstract

An electronic device can include a nonvolatile memory cell, wherein the nonvolatile memory cell can include an access transistor, a read transistor, and an antifuse component coupled to the access transistor and the read transistor. In an embodiment, the read transistor can include a gate electrode, and the antifuse component can include a first electrode and a second electrode overlying the first electrode. The gate electrode and the first electrode can be parts of the same gate member. In another embodiment, the access transistor can include a gate electrode, and the antifuse component can include a first electrode, an antifuse dielectric layer, and a second electrode. The electronic device can further include a conductive member overlying the antifuse dielectric layer and the gate electrode of the access transistor, wherein the conductive member is configured to electrically float. Processes for making the same are also disclosed.


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