The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2014
Filed:
May. 03, 2012
Kalpendu Shastri, Orefield, PA (US);
Vipulkumar Patel, Breinigsville, PA (US);
Mark Webster, Bethlehem, PA (US);
Prakash Gothoskar, Allentown, PA (US);
Ravinder Kachru, Los Altos Hills, CA (US);
Soham Pathak, Allentown, PA (US);
Rao V. Yelamarty, Allentown, PA (US);
Thomas Daugherty, Allentown, PA (US);
Bipin Dama, Bridgewater, NJ (US);
Kaushik Patel, San Jose, CA (US);
Kishor Desai, Fremont, CA (US);
Kalpendu Shastri, Orefield, PA (US);
Vipulkumar Patel, Breinigsville, PA (US);
Mark Webster, Bethlehem, PA (US);
Prakash Gothoskar, Allentown, PA (US);
Ravinder Kachru, Los Altos Hills, CA (US);
Soham Pathak, Allentown, PA (US);
Rao V. Yelamarty, Allentown, PA (US);
Thomas Daugherty, Allentown, PA (US);
Bipin Dama, Bridgewater, NJ (US);
Kaushik Patel, San Jose, CA (US);
Kishor Desai, Fremont, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a 'platform' (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.