The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2014

Filed:

Dec. 20, 2010
Applicants:

Taichi Koyama, Tokyo, JP;

Hironobu Moriyama, Tokyo, JP;

Takashi Matsumura, Tokyo, JP;

Takayuki Saito, Tokyo, JP;

Inventors:

Taichi Koyama, Tokyo, JP;

Hironobu Moriyama, Tokyo, JP;

Takashi Matsumura, Tokyo, JP;

Takayuki Saito, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C08L 63/00 (2006.01); C08L 63/02 (2006.01); C08L 63/04 (2006.01); H05K 1/18 (2006.01); H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
Abstract

An epoxy resin composition having excellent connection reliability and transparency, a method for manufacturing a composite unit using the epoxy resin composition, and the composite unit, are disclosed. The manufacturing method includes an attaching step of attaching an epoxy resin composition () containing a novolak phenolic curing agent, an acrylic elastomer composed of a copolymer containing dimethylacrylamide and hydroxylethyl methacrylate, an epoxy resin and not less than 5 parts by weight to not more than 20 parts by weight of an inorganic filler to 100 parts by weight of the epoxy resin, to a printed circuit board () in the form of a sheet. The manufacturing method also includes a temporary loading step of temporarily loading a semiconductor chip () and capacitors () to () on the epoxy resin composition () and an ultimate pressure bonding step of pressuring the semiconductor chip () and capacitors () to () by a thermal bonding head () in situ to ultimately pressure bond the semiconductor chip () and capacitors () to ().


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