The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2014
Filed:
Jul. 31, 2013
Samsung Electronics Co., Ltd., Suwon-si, KR;
Ji Hwang Kim, Bucheon-si, KR;
Tae Hong Min, Yongin-si, KR;
Chajea Jo, Bucheon-si, KR;
Taeje Cho, Hwaseong-si, KR;
Young Kun Jee, Suwon-si, KR;
Yun Seok Choi, Hwaseong-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-Do, KR;
Abstract
A method of manufacturing a semiconductor package includes preparing a parent substrate including package board parts laterally spaced apart from each other, mounting a first chip including a through-via electrode on each of the package board parts, forming a first mold layer on the parent substrate having the first chips, planarizing the first mold layer to expose back sides of the first chips, etching the exposed back sides of the first chips to expose back sides of the through-via electrodes, forming a passivation layer on the planarized first mold layer, the etched back sides of the first chips, and the back sides of the through-via electrodes, and selectively removing the passivation layer to expose the back sides of the through-via electrodes.