The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2014
Filed:
May. 17, 2011
Chen-fu Chu, Hsinchu, TW;
Trung Tri Doan, Baoshan Township, TW;
Hao-chun Cheng, Pingtung County 928, TW;
Feng-hsu Fan, Jhonghe, TW;
Fu-hsien Wang, Sinpu Township, TW;
Chen-Fu Chu, Hsinchu, TW;
Trung Tri Doan, Baoshan Township, TW;
Hao-Chun Cheng, Pingtung County 928, TW;
Feng-Hsu Fan, Jhonghe, TW;
Fu-Hsien Wang, Sinpu Township, TW;
SemiLEDS Optoelectronics Co., Ltd., Chu-Nan, TW;
Abstract
A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.