The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2014

Filed:

Feb. 28, 2012
Applicants:

Swathi Gangasani, Bangalore, IN;

Srinivasulu Alampally, Costa Mesa, CA (US);

Prohor Chowdhury, Bangalore, IN;

Srinivasa B S Chakravarthy, Bangalore, IN;

Padmini Sampath, Bangalore, IN;

Rubin Ajit Parekhji, Bangalore, IN;

Inventors:

Swathi Gangasani, Bangalore, IN;

Srinivasulu Alampally, Costa Mesa, CA (US);

Prohor Chowdhury, Bangalore, IN;

Srinivasa B S Chakravarthy, Bangalore, IN;

Padmini Sampath, Bangalore, IN;

Rubin Ajit Parekhji, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/27 (2006.01);
U.S. Cl.
CPC ...
G06F 11/27 (2013.01);
Abstract

A built-in self-test (BIST) diagnostic system tests the execution of a processor. The processor is arranged to execute a normal application for controlling a process that is external to the processor. The normal execution is executed in normal execution timeslots that have idle timeslots that are interspersed in time between the normal execution timeslots. A BIST controller is arranged to detect the presence of an idle timeslot in the execution of the processor and to use a scan chain to scan-in a first test pattern for a test application for testing the processor. The first test pattern is executed by the processor during the detected idle timeslot and a first result pattern generated by the execution of the first test pattern is scanned-out. The scanned-out first test pattern is evaluated to determine the presence of an error. The first test pattern application is conditionally interruptible.


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