The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2014

Filed:

Aug. 05, 2011
Applicant:

Jong-joo Lee, Suwon-si, KR;

Inventor:

Jong-Joo Lee, Suwon-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/48 (2006.01); H05K 3/34 (2006.01); H05K 1/11 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H05K 1/02 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H05K 1/111 (2013.01); H05K 3/3436 (2013.01); H01L 2224/1712 (2013.01); H01L 2224/06179 (2013.01); H05K 2201/09781 (2013.01); H01L 2224/0603 (2013.01); H05K 1/0271 (2013.01); H01L 2225/06541 (2013.01); H01L 2224/16146 (2013.01); H05K 2201/09418 (2013.01); H04L 2225/06513 (2013.01); H05K 2201/10674 (2013.01); H01L 2224/1703 (2013.01); H01L 23/49838 (2013.01); H01L 23/3128 (2013.01); H01L 2224/16227 (2013.01); H01L 2225/06517 (2013.01); H01L 2924/01047 (2013.01); H01L 25/0657 (2013.01); H01L 24/17 (2013.01); H01L 2224/05552 (2013.01); H01L 2224/06154 (2013.01); H01L 2224/06152 (2013.01); H01L 2924/014 (2013.01); H01L 2224/06051 (2013.01); H01L 2224/17517 (2013.01); H01L 2224/06517 (2013.01); H01L 2924/01033 (2013.01); H01L 2225/06568 (2013.01); H01L 24/06 (2013.01);
Abstract

A package substrate includes an insulating substrate, a functional pattern and a main dummy pattern. A semiconductor chip is arranged on the insulating substrate. The functional pattern is formed on the insulating substrate. The functional pattern is electrically connected to the semiconductor chip. The main dummy pattern is formed on a portion of the insulating substrate at least of to the outside of and/or adjacent the functional pattern in a path of stress generated by a difference between thermal expansion coefficient of the insulating substrate and the semiconductor chip, so as to divert the stress away from the functional pattern. Thus, the stress is not concentrated on the functional pattern. As a result, damage to the functional bump caused by the stress is prevented.


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