The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2014
Filed:
Dec. 20, 2012
Applicant:
Stmicroelectronics Pte Ltd., Singapore, SG;
Inventors:
Assignee:
STMicroelectronics Pte Ltd, Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract
A bar formed from a reconstituted wafer and containing one or more conductive material filled voids is used to electrically and physically connect the top and bottom packages in a package-on-package (PoP) package. The bar is disposed in the fan out area of the lower package forming the PoP package.
Ramasamy, Anandan. (2014). Embedded wafer level ball grid array bar systems and methods (U.S. Patent No. 8796139). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8796139
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