The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 29, 2014
Filed:
Mar. 14, 2013
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Hung-Wen Hsu, Tainan, TW;
Tung-Ting Wu, Taipei, TW;
Jiech-Fun Lu, Tainan County, TW;
Yeur-Luen Tu, Taichung, TW;
Chia-Shiung Tsai, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for preventing arcing during processing of a back side of a semiconductor wafer is provided herein. The method comprising includes steps of depositing a dielectric layer over the back side and depositing an anti-arcing layer over the dielectric layer. The anti-arcing layer is a conductive layer, but it not suitable for conducting signals or power. The method further includes etching an opening through a plurality of material layers of the semiconductor wafer. The opening exposes a conductive layer located on a front side of the semiconductor wafer. Additionally, the method includes depositing a conductive layer in the opening to form a through-wafer interconnect. A semiconductor wafer fabricated according to the method is also disclosed.