The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8787439 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 22, 2014

Filed:

Mar. 13, 2012
Applicants:

Chaitanya Palusa, Fremont, CA (US);

Tomasz Prokop, Pleasanton, CA (US);

Adam B. Healey, Newburyport, MA (US);

YE Liu, San Jose, CA (US);

Inventors:

Chaitanya Palusa, Fremont, CA (US);

Tomasz Prokop, Pleasanton, CA (US);

Adam B. Healey, Newburyport, MA (US);

Ye Liu, San Jose, CA (US);

Assignee:

LSI Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 27/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

In described embodiments, a Decision Feed Forward Equalizer (DFFE) comprises a hybrid architecture combining features of a Feed Forward Equalizer (FFE) and a Decision Feedback Equalizer (DFE). An exemplary DFFE offers relatively improved noise and crosstalk immunity than an FFE implementation alone, and relatively lower burst error propagation than a DFE implementation alone. The exemplary DFFE is a relatively simple implementation due few or no critical feedback paths, as compared to a DFE implementation alone. The exemplary DFFE allows for a parallel implementation of its DFE elements without an exponential increase in the hardware for higher numbers of taps. The exemplary DFFE allows for cascading, allowing for progressive improvement in BER, at relatively low implementation cost as a solution to achieve multi-tap DFE performance.


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