The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 2014
Filed:
Jan. 11, 2013
Thorsten Meyer, Regensburg, DE;
Sven Albers, Regensburg, DE;
Christian Geissler, Teugn, DE;
Andreas Wolter, Regensburg, DE;
Markus Brunnbauer, Lappersdorf, DE;
David O'sullivan, Sinzing, DE;
Frank Zudock, Regensburg, DE;
Jan Proschwitz, Riesa, DE;
Thorsten Meyer, Regensburg, DE;
Sven Albers, Regensburg, DE;
Christian Geissler, Teugn, DE;
Andreas Wolter, Regensburg, DE;
Markus Brunnbauer, Lappersdorf, DE;
David O'Sullivan, Sinzing, DE;
Frank Zudock, Regensburg, DE;
Jan Proschwitz, Riesa, DE;
Intel Mobile Communications GmbH, Neubiberg, DE;
Abstract
A semiconductor device is described having at least one semiconductor chip, the chip having an active area on a top side thereof, the active area formed at least in part of low-k material, said low-k material defining a low-k subarea of said active area; an embedding material, in which said at least one semiconductor chip is embedded, at least part of the embedding material forming a coplanar area with said active area; at least one contact area within the low-k subarea; a redistribution layer on the coplanar area, the redistribution layer connected to said contact areas; at least one first-level interconnect, located outside said low-k subarea, the first-level interconnect electrically connected to at least one of said contact areas via the redistribution layer.