The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2014

Filed:

Nov. 23, 2011
Applicants:

Che-hao Chuang, Hsinchu County, TW;

Kun-hsien Lin, Hsinchu, TW;

Ryan Hsin-chin Jiang, Taipei, TW;

Inventors:

Che-Hao Chuang, Hsinchu County, TW;

Kun-Hsien Lin, Hsinchu, TW;

Ryan Hsin-Chin Jiang, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 27/02 (2006.01); H01L 29/866 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0296 (2013.01); H01L 29/866 (2013.01); H01L 29/8613 (2013.01);
Abstract

A transient voltage suppressor without leakage current is disclosed, which comprises a P-substrate. There is an N-type epitaxial layer formed on the P-substrate, and a first N-heavily doped area, a first P-heavily doped area, an electrostatic discharge (ESD) device and at least one deep isolation trench are formed in the N-epitaxial layer. A first N-buried area is formed in the bottom of the N-epitaxial layer to neighbor the P-substrate and located below the first N-heavily doped area and the first P-heavily doped area. The ESD device is coupled to the first N-heavily doped area. The deep isolation trench is not only adjacent to the first N-heavily doped area, but has a depth greater than a depth of the first N-buried area, thereby separating the first N-buried area and the ESD device.


Find Patent Forward Citations

Loading…