The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8782374 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 15, 2014

Filed:

Dec. 02, 2008
Applicants:

Lihu Rappoport, Haifa, IL;

Chen Koren, Haifa, IL;

Franck Sala, Haifa, IL;

Oded Lempel, Moshav Amikam, IL;

Ido Ouziel, Haifa, IL;

Ron Gabor, Raanana, IL;

Gregory Pribush, Haifa, IL;

Lior Libis, Haifa, IL;

Inventors:

Lihu Rappoport, Haifa, IL;

Chen Koren, Haifa, IL;

Franck Sala, Haifa, IL;

Oded Lempel, Moshav Amikam, IL;

Ido Ouziel, Haifa, IL;

Ron Gabor, Raanana, IL;

Gregory Pribush, Haifa, IL;

Lior Libis, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 12/10 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1027 (2013.01); G06F 2212/652 (2013.01); G06F 12/1036 (2013.01);
Abstract

Methods and apparatus for inclusion of TLB (translation look-aside buffer) in processor micro-op caches are disclosed. Some embodiments for inclusion of TLB entries have micro-op cache inclusion fields, which are set responsive to accessing the TLB entry. Inclusion logic may the flush the micro-op cache or portions of the micro-op cache and clear corresponding inclusion fields responsive to a replacement or invalidation of a TLB entry whenever its associated inclusion field had been set. Front-end processor state may also be cleared and instructions refetched when replacement resulted from a TLB miss.


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