The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2014
Filed:
May. 05, 2012
Eduard Albert Cartier, New York, NY (US);
Michael P. Chudzik, Danbury, CT (US);
Andreas Kerber, Mount Kisco, NY (US);
Siddarth Krishnan, Peekskill, NY (US);
Naim Moumen, Walden, NY (US);
Eduard Albert Cartier, New York, NY (US);
Michael P. Chudzik, Danbury, CT (US);
Andreas Kerber, Mount Kisco, NY (US);
Siddarth Krishnan, Peekskill, NY (US);
Naim Moumen, Walden, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for fabricating a CMOS device includes the following steps. A wafer is provided. STI is used to form at least one active area in the wafer. A silicon oxide layer is deposited onto the wafer covering the active area. A first high-k material is deposited onto the silicon oxide layer. Portions of the silicon oxide layer and the first high-k material are selectively removed, such that the silicon oxide layer and the first high-k material remain over one or more first regions of the active area and are removed from over one or more second regions of the active area. A second high-k material is deposited onto the first high-k material over the one or more first regions of the active area and onto a surface of the wafer in the one or more second regions of the active area. A CMOS device is also provided.