The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2014
Filed:
Nov. 19, 2012
International Business Machines Corporation, Armonk, NY (US);
Charles Jay Alpert, Austin, TX (US);
Joseph Nicolas Kozhaya, Morrisville, NC (US);
Zhuo Li, Cedar Park, TX (US);
Joseph J. Palumbo, Poughkeepsie, NY (US);
Haifeng Qian, White Plains, NY (US);
Phillip John Restle, Katonah, NY (US);
Chin Ngai Sze, Austin, TX (US);
Ying Zhou, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A design tool with a direct current (DC) transformation analysis unit determines combinations of candidate sink locations for sector buffers within a sector of a clock network design. For each of the combination of candidate sink locations, the design tool transforms resistances of the sector with the combination of candidate sink locations into resistances of an electrical circuit. The design tool transforms capacitances of the sector with the combination of candidate sink locations into current sources of an electrical circuit. The design tool performs a DC circuit analysis, wherein results of the DC circuit analysis include a variance of voltage at nodes of the sector and a maximum value of current from currents flowing between pairs of the nodes of the sector. The design tool determines which of the combination of candidate sink locations has the minimum variance of voltage with the results of the DC circuit analysis.