The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2014
Filed:
Aug. 29, 2012
Federico Agustin Altolaguirre, Hsinchu County, TW;
Ming-dou Ker, Hsinchu County, TW;
Ryan Hsin-chin Jiang, Taipei, TW;
Federico Agustin Altolaguirre, Hsinchu County, TW;
Ming-Dou Ker, Hsinchu County, TW;
Ryan Hsin-Chin Jiang, Taipei, TW;
Amazing Microelectronic Corp., New Taipei, TW;
Abstract
A power-rail ESD clamp circuit with a silicon controlled rectifier and a control module is provided. The silicon controlled rectifier is connected to a high voltage level and a low voltage level for bearing a current flow. The control module is connected to the silicon controlled rectifier in parallel, and includes a PMOS, a NMOS, at least one output diode, a resistor and a conducting string. The silicon controlled rectifier is a P+ or N+ triggered silicon controlled rectifier. By employing the novel power-rail ESD clamp circuit, it is extraordinarily advantageous of reducing both a standby leakage current and layout area while implementation.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile