The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2014
Filed:
May. 24, 2012
Chung-fu Chang, Kaohsiung, TW;
Yu-hsiang Hung, Tainan, TW;
Shin-chuan Huang, Tainan, TW;
Chia-jong Liu, Ping-Tung County, TW;
Yen-liang Wu, Taipei, TW;
Pei-yu Chou, Tainan, TW;
Chung-Fu Chang, Kaohsiung, TW;
Yu-Hsiang Hung, Tainan, TW;
Shin-Chuan Huang, Tainan, TW;
Chia-Jong Liu, Ping-Tung County, TW;
Yen-Liang Wu, Taipei, TW;
Pei-Yu Chou, Tainan, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A semiconductor process includes the following steps. A gate structure is formed on a substrate. A main spacer is formed on the substrate beside the gate structure. A source/drain is formed in the substrate beside the main spacer. After the source/drain is formed, an epitaxial structure is formed in the substrate beside the main spacer. A gate structure may be respectively formed in a first area and a second area of a substrate. A main spacer is formed on the substrate respectively beside the two gate structures. A source/drain is formed in the substrate respectively beside the two spacers. After the two source/drains are formed, an epitaxial structure is formed in the substrate respectively beside the main spacers.