The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2014
Filed:
Dec. 27, 2012
Gregory Eric Howard, Plano, TX (US);
Andy Quang Tran, Grand Prairie, TX (US);
Yanli Fan, Allen, TX (US);
Kartheinz Muth, Richardson, TX (US);
Gregory Eric Howard, Plano, TX (US);
Andy Quang Tran, Grand Prairie, TX (US);
Yanli Fan, Allen, TX (US);
Kartheinz Muth, Richardson, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A system is provided for use with circuit layout design data having a set of differential pairs and a set of bond wire pairs. A layout portion can receive the circuit layout design data. A crosstalk calculating portion can determine a first amount of crosstalk in a circuit corresponding to the circuit layout design data. A modifier can modify the circuit layout design data into modified circuit layout design data such that one of the set of differential pairs and the set of bond wire pairs includes a crossover. The crosstalk calculating portion can further determine a second amount of crosstalk in a circuit corresponding to the modified circuit layout design data. An optimizer can compare the first amount of crosstalk with the second amount of crosstalk to generate optimized circuit layout design data. A layout designer can output the optimized circuit layout design data.