The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2014
Filed:
Dec. 20, 2010
Aamer Jaleel, Cambridge, MA (US);
Simon C. Steely, Jr., Hudson, NH (US);
Eric R. Borch, Fort Collins, CO (US);
Malini K. Bhandaru, Sudbury, MA (US);
Joel S. Emer, Hudson, MA (US);
Aamer Jaleel, Cambridge, MA (US);
Simon C. Steely, Jr., Hudson, NH (US);
Eric R. Borch, Fort Collins, CO (US);
Malini K. Bhandaru, Sudbury, MA (US);
Joel S. Emer, Hudson, MA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An apparatus and method for improving cache performance in a computer system having a multi-level cache hierarchy. For example, one embodiment of a method comprises: selecting a first line in a cache at level N for potential eviction; querying a cache at level M in the hierarchy to determine whether the first cache line is resident in the cache at level M, wherein M<N; in response to receiving an indication that the first cache line is not resident at level M, then evicting the first cache line from the cache at level N; in response to receiving an indication that the first cache line is resident at level M, then retaining the first cache line and choosing a second cache line for potential eviction.