The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Aug. 08, 2012
Applicants:

Stephen P. Ayotte, Briston, VT (US);

Timothy H. Daubenspeck, Colchester, VT (US);

David J. Hill, Richmond, VT (US);

Glen E. Richard, Essex Junction, VT (US);

Timothy M. Sullivan, Essex Junction, VT (US);

Inventors:

Stephen P. Ayotte, Briston, VT (US);

Timothy H. Daubenspeck, Colchester, VT (US);

David J. Hill, Richmond, VT (US);

Glen E. Richard, Essex Junction, VT (US);

Timothy M. Sullivan, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Aspects of the present invention relate to a controlled collapse chip connection (C4) structures. Various embodiments include a method of forming a controlled collapse chip connection (C4) structure. The method can include: providing a precursor structure including: a substrate, a dielectric over the substrate, the dielectric including a plurality of trenches exposing a portion of the substrate, and a metal layer over the dielectric and the portion of the substrate in each of the plurality of trenches, forming a resist layer over the metal layer, forming a rigid liner over a surface of the resist layer and the metal layer, and forming solder over the rigid liner between portions of the resist layer.


Find Patent Forward Citations

Loading…