The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2014
Filed:
Nov. 05, 2010
Jeng-shiun Ho, Hsin-Chu, TW;
Luke Lo, Pingjhen, TW;
Ting-chun Liu, Xizhi, TW;
Min-hung Cheng, Hsinchu, TW;
Jing-wei Shih, Banqiao, TW;
Wen-han Chu, Hsinchu, TW;
Cheng-cheng Kuo, Hsinchu County, TW;
Hua-tai Lin, Hsin-Chu, TW;
Tsai-sheng Gau, HsinChu, TW;
Ru-gun Liu, Hsinchu, TW;
Yu-hsiang Lin, Hsinchu, TW;
Shang-yu Huang, Hsinchu, TW;
Jeng-Shiun Ho, Hsin-Chu, TW;
Luke Lo, Pingjhen, TW;
Ting-Chun Liu, Xizhi, TW;
Min-Hung Cheng, Hsinchu, TW;
Jing-Wei Shih, Banqiao, TW;
Wen-Han Chu, Hsinchu, TW;
Cheng-Cheng Kuo, Hsinchu County, TW;
Hua-Tai Lin, Hsin-Chu, TW;
Tsai-Sheng Gau, HsinChu, TW;
Ru-Gun Liu, Hsinchu, TW;
Yu-Hsiang Lin, Hsinchu, TW;
Shang-Yu Huang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
The present disclosure provides a photomask. The photomask includes a first integrated circuit (IC) feature formed on a substrate; and a second IC feature formed on the substrate and configured proximate to the first IC feature. The first and second IC features define a dense pattern having a first pattern density. The second IC feature is further extended from the dense pattern, forming an isolated pattern having a second pattern density less than the first pattern density. A transition region is defined from the dense pattern to the isolated pattern. The photomask further includes a sub-resolution rod (SRR) formed on the substrate, disposed in the transition region, and connected with the first IC feature.