The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8762994 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 24, 2014

Filed:

Aug. 26, 2010
Applicant:

Ramakrishna Saripalli, Cornelius, OR (US);

Inventor:

Ramakrishna Saripalli, Cornelius, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus, method, system, and computer-readable medium are disclosed. In one embodiment the apparatus is a processor. The processor includes thread remapping logic that is capable of tracking hardware thread interrupt equivalence information for a first hardware thread and a second hardware thread. The processor also includes logic to receive an interrupt issued from a device, wherein the interrupt has an affinity tied to the first hardware thread. The processor also includes logic to redirect the interrupt to the second hardware thread when the hardware thread interrupt equivalence information validates the second hardware thread is capable of handling the interrupt.


Find Patent Forward Citations

Saripalli, Ramakrishna. (2014). Power-optimized interrupt delivery (U.S. Patent No. 8762994). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8762994

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…