The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2014
Filed:
Jan. 15, 2014
AU Optronics Corp., Hsin-Chu, TW;
Hui-Ling Ku, Hsin-Chu, TW;
Chia-Yu Chen, Hsin-Chu, TW;
Yi-Chen Chung, Hsin-Chu, TW;
Yu-Hung Chen, Hsin-Chu, TW;
Chi-Wei Chou, Hsin-Chu, TW;
Fan-Wei Chang, Hsin-Chu, TW;
Hsueh-Hsing Lu, Hsin-Chu, TW;
Hung-Che Ting, Hsin-Chu, TW;
AU Optronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A manufacturing method of an array substrate includes the following steps. A first conductive layer, a gate insulating layer, a semiconductor layer, an etching stop layer, and a first patterned photoresist are successively formed on a substrate. The etching stop layer and the semiconductor layer uncovered by the first patterned photoresist are then removed by a first etching process. A patterned gate insulating layer and a patterned etching stop layer are then formed through a second etching process. The first conductive layer uncovered by the patterned gate insulating layer is then removed to form a gate electrode. The semiconductor layer uncovered by the patterned etching stop layer is then removed to form a patterned semiconductor layer and partially expose the patterned gate insulating layer.