The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2014

Filed:

Sep. 12, 2011
Applicants:

Akira Ishigami, Tochigi, JP;

Shiyuki Kanisawa, Tochigi, JP;

Hidetsugu Namiki, Tochigi, JP;

Hideaki Umakoshi, Tochigi, JP;

Masaharu Aoki, Tochigi, JP;

Inventors:

Akira Ishigami, Tochigi, JP;

Shiyuki Kanisawa, Tochigi, JP;

Hidetsugu Namiki, Tochigi, JP;

Hideaki Umakoshi, Tochigi, JP;

Masaharu Aoki, Tochigi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A buffer film for multi-chip packaging which does not cause out of alignment during multi-chip packaging and ensures favorable connection reliability has a structure in which a heat-resistant resin layer having a linear expansion coefficient of 80 ppm/° C. or less and a flexible resin layer made of a resin material having a Shore A hardness according to JIS K6253 of 10 to 80 are laminated. A multi-chip module can be produced by aligning a plurality of chip devices on a substrate through an adhesive to perform temporary adhesion, disposing the buffer film for multi-chip packaging between the chip devices and a bonding head so that the heat-resistant resin layer is on a chip device side, and connecting the plurality of chip devices with the substrate by applying heat and pressure to the chip devices toward the substrate with the bonding head.


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