The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2014
Filed:
Jan. 30, 2012
Applicants:
Wei Lin, Taipei, TW;
Riichiro Shirota, Hsinchu, TW;
Nina Mitiukhina, Hsin Chu, TW;
Tsai-hao Kuo, Tainan, TW;
Inventors:
Wei Lin, Taipei, TW;
Riichiro Shirota, Hsinchu, TW;
Nina Mitiukhina, Hsin Chu, TW;
Tsai-Hao Kuo, Tainan, TW;
Assignee:
Phison Electronics Corp., Miaoli, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/00 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01);
Abstract
A NAND flash memory unit is described, including a string of memory cells connected in series, S/D regions coupled to two terminals of the string, at least one select transistor couple between a terminal of the string and an S/D region, and at least one erase transistor couple between the at least one select transistor and an S/D region. The select transistor is for selecting the string of memory cells. The erase transistor is for reducing Vt-shift of the select transistor.